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Job Description:
Intel labs is a world class research lab with the mission to drive research
and development of innovative technologies. In this position of ASIC backend
design lead, you will be in Intel labs China one of the top branches in Intel
labs, will be responsible for backend include synthesis, DFT, place and route,
custom design for high performance or low power ASIC. You will also work very
closely with architect and designer to give them feedback on power, area
estimation for given design.
Qualifications:
Minimum qualifications are required to be initially considered for this
position. Preferred qualifications are in addition to the minimum requirements
and are considered a plus factor in identifying top candidates. Minimum
Qualifications: ？ BE or equivalent degree ？ Experience in high performance or
lower power ASIC design include CPU, DSP, or other ？ 5-8 years high performance
backend design experience. Delivering successful products from conception to
functional silicon. Solid background and understanding of CPU/SoC design
details, tools, flows and methodologies pertaining to synthesis, APR, timing,
power, noise convergence flows, layout verification and tape-out of
full-fledged complex SoCs. ？ Strong project management skills and the ability
to drive teamwork internally and externally ？ Good at communication ？ Good
spoken and written English. Preferred Qualifications: ？ Experience of CPU
backend ？ Experience of custom design ？ Successful tape-out experience of CPU,
GPU, or any complex SoC highly desirable ？ Master in CS or EERequirements
listed would be obtained through a combination of industry relevant job
experience, internship experiences and or schoolwork/classes/research.